1. Field of the Invention
This invention relates to a heat treatment method in a manufacturing process of a semiconductor device, and more particularly to a manufacturing method of a semiconductor device subjected to the heat treatment process for diffusing impurity ions by use of an optical heating apparatus.
2. Description of the Related Art
Enhancement of the performance of LSIs is achieved by enhancing the integration density thereof, that is, miniaturizing the elements which configure the LSI. However, concomitant with the reduction in the element dimensions is an increase in the parasitic resistance and short channel effect. This therefore raises the importance of being able to form resistors of lower resistance and pn junctions that are shallower.
Shallow impurity diffusion regions can be formed by optimizing the ion-implantation process with a low acceleration energy, and then performing an annealing process. In order to lower the resistance of the diffusion layer of the impurity diffusion region, it is necessary to perform the annealing process, which activates the impurity, at a high temperature.
Boron (B), phosphorus (P) or arsenic (As) is widely used as the impurity to be ion-implanted. However, since the diffusion coefficient of the above impurity in silicon (Si) is large, impurity ions are inwardly diffused and outwardly diffused in a rapid thermal anneal (RTA) process using a halogen lamp, making it gradually more difficult to form shallow impurity diffusion layers.
The above inward diffusion and outward diffusion can be suppressed by lowering the anneal temperature. However, if the anneal temperature is lowered, the impurity activation rate is also significantly lowered. Since there is a limit in reducing the anneal time by use of a halogen lamp, it is difficult to form impurity diffusion layers having low resistances and shallow junctions (not deeper than 15 nm) in the RTA process using the conventional halogen lamp.
Therefore, recently, in order to cope with the above problem, an anneal method using a flash lamp having a rare gas such as xenon (Xe) sealed therein is studied as a method for instantaneously supplying the energy required for activation. Such a flash lamp can emit light with a pulse width of 100 ms or less, or a sub-millisecond width. Therefore, the impurity ions can be activated without substantially changing the distribution of impurity ions implanted into the wafer surface.
Since it is impossible to raise the temperature at which the impurity ions can be activated solely by use of the flash lamp, it is a common practice to pre-heat the substrate, by use of auxiliary heating means, before the process of heating the substrate by use of the flash lamp (for example, refer to Jpn. Pat. Appln. KOKAI Publication No. 2003-133250).
However, the conventional flash lamp anneal method has the following problem. That is, in order to fully activate the impurities by the above method, a large application energy of 20 J/cm2 or more is required. When such a large amount of energy is applied with a pulse width of 100 ms or less, the temperature of the wafer surface may instantaneously rise to 1200° C. or more. Therefore, temperature differences occur between the center of the wafer and the outer peripheral portion, and between the front surface side and the rear surface side, which causes thermal stress within the wafer.
Particularly, since the total thermal stress increases with the size of the wafer, damage such as slips tends to be induced, which can lead to cracks in the worst case, which would lower the manufacturing yield. That is, in the present flash lamp anneal method, the process window is narrow and it is difficult to form shallow impurity diffusion regions without damaging the wafer.
In summary then, in the conventional means of raising the temperature of the outer peripheral portion of a wafer using a halogen lamp or the like over a duration of the ms order, no attention is paid to the thermal stress generated within the wafer, such as that generated in the flash lamp anneal method (for example, refer to Japanese Patent KOKOKU Publication No. S62-44847 and Japanese Patent KOKOKU Publication No. H02-5295).